Architecture & System Design of NB-IoT Transceivers
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Workshop by
Wizlogix Pte Ltd
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SGD 5,000.00
Details
The Internet of Things (IoT) has been receiving a lot of attention in recent years. Despite the hype, the market has been slow to develop. Billions of devices are already connected to the internet, but as a quiet IoT revolution happens in the background, billions more are becoming accessible.
One of the main considerations for IoT engineers is how to connect a device. During this 5-day course, you will learn more about Narrow Band IoT, which is a standard defined by the 3rd Generation Partnership Project (3GPP) for connecting devices to the internet via cellular networks. You will also cover the development of transceiver architectures, as well as how to take a top-level specification and break it down into blocks to design a first-class architecture.
Benefit from hands-on lab work using the National Instruments AWR simulator and deepen your understanding using Octave.
Who Should Attend?
- RFIC and analog circuit design engineers, researchers and graduate students who are interested in higher level system and architecture design
- Electronic engineers who want to move into IoT field and communication transceiver design
- Technical managers, marketing engineers and marketing managers who want to understand NB-IoT
31 May - 04 Jun 2021
22 - 26 Nov 2021
Copy the link to your browser for Course Brochure:
http://www.wizlogix.com/edm/NB_IoT/
Training Grants Available! Email us at [email protected] or Call us at +65 6272 6366 for more information & registration!
Outline
Programme/Course Objective:
- Understand the basic operation of NB IoT
- Know how to find and read 3GPP specification
- Become familiar with transceiver and front-end architectures for NB IoT
- Understand requirements of the receive function
- Derive the key specifications for receive function
- Develop an architecture for the receiver and understand trade-offs involved
- Understand requirements for transmit function
- Derive the key transmit specifications
- Develop transmitter architecture and understand trade-offs involved
- Derive key frequency and timing specifications
- Develop synthesizer architectures to meet those requirements
- Understand front end module specification and trade-offs
- Use design tools in specification and development of transceiver architecture
Course Structure:
- What is NB IoT
- Receiver specifications and architecture development
- Transmitter specifications and architecture development
- RF front0end, transmit and receive block development
- Synthesizer specification
Speaker/s
Malcolm H. Smith is a director of AnalogueSmith (S) Pte. Ltd. a Singapore based design house delivering RF and analogue centric solutions with focus on IoT sensor nodes. He has been working as an independent consultant in the semiconductor industry for
over 4 years and has over 25 years industrial experience delivering mixed-signal, analogue, RFIC and RF solutions. Prior to becoming a consultant, he worked for over 9 years at Amalfi Semiconductor and, after RFMD purchased Amalfi Semiconductor, at RFMD on
the design of CMOS power amplifiers and front-ends for cellular applications.
He was the inventor of the output structure used on all Amalfi/RFMD CMOS PAs and was also the sole inventor of the method used to integrate the front-end switching in bulk CMOS for the World's first GSM/GPRS Tx Modules with integrated switch. He was also the lead of the group that designed a Band I WCDMA amplifier with the World leading Figure Of Merit (FOM) for a CMOS PA of 80.
Prior to Amalfi Semiconductor, Dr. Smith worked at Intel where he was responsible for the architecture and system design of cellular transceivers and was involved in making the first call on a public network using an Intel designed transceiver. Dr. Smith started in the cellular field at Bell Labs in 1996 where he was delivered mixed-signal, analogue, and RFIC circuits for cellular and pager products.
Before Bell Labs and after graduating with a Ph.D. he worked for over three years at Matsushita Electric Works (now renamed Panasonic) in Osaka, Japan, on the design of analogue sensor circuits. He holds over 40 patents, has delivered invited tutorials at conferences in Asia, the US and Europe and has published several Journal and conference papers.
Dr. Smith was awarded the B.Sc (Hons) degree in Microelectronics from the University of Edinburgh, the M.Sc. from the University of Westminster and the Ph.D. Degree from the University of Kent all in the UK. He is a Senior Member of the IEEE and a Member of the IET in the UK.
He was the inventor of the output structure used on all Amalfi/RFMD CMOS PAs and was also the sole inventor of the method used to integrate the front-end switching in bulk CMOS for the World's first GSM/GPRS Tx Modules with integrated switch. He was also the lead of the group that designed a Band I WCDMA amplifier with the World leading Figure Of Merit (FOM) for a CMOS PA of 80.
Prior to Amalfi Semiconductor, Dr. Smith worked at Intel where he was responsible for the architecture and system design of cellular transceivers and was involved in making the first call on a public network using an Intel designed transceiver. Dr. Smith started in the cellular field at Bell Labs in 1996 where he was delivered mixed-signal, analogue, and RFIC circuits for cellular and pager products.
Before Bell Labs and after graduating with a Ph.D. he worked for over three years at Matsushita Electric Works (now renamed Panasonic) in Osaka, Japan, on the design of analogue sensor circuits. He holds over 40 patents, has delivered invited tutorials at conferences in Asia, the US and Europe and has published several Journal and conference papers.
Dr. Smith was awarded the B.Sc (Hons) degree in Microelectronics from the University of Edinburgh, the M.Sc. from the University of Westminster and the Ph.D. Degree from the University of Kent all in the UK. He is a Senior Member of the IEEE and a Member of the IET in the UK.
Special Offer
Group Discount
A group discount will be awarded if a group of 3 or more participants register. The fees will be lowered to $4500 per pax.
Early-Bird Discount
The first 10 pax to sign up will enjoy an early-bird pricing of $3899 per pax.
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Wizlogix was founded by our Directors, Angeline Lee and Shawn Ng in year 2000. We were awarded with our first major contract in PCB layout design from HP (Hewlett Packard), and have developed long term business relations with them ever since.
- In 2004, Wizlogix invested in high-end EDA tools to be used for in-house layout design services and explored into additional services such as PCB prototyping fabrication and assembly.
- In 2007, the Wizlogix Training Hub was established. Working with renowned trainers internationally, we aim to provide technical competency courses and certification programs for local engineers.
- In 2009, we further expanded to specialize in quick turn prototyping, New Product Introduction (NPI) and High Mix Low Volume (HMLV) builds.
- With the aim of expanding like an MNC, Wizlogix embarked on improving employee engagement through HR Capability Programmes in 2011.
- In 2012, we became an IPC member to gear ourselves towards a worldwide industry standard in PCB qualities acceptance.
- By 2013, Wizlogix was involved in the PCB layout of a joint commercial satellite design and development project between DSO and NTU, and the satellite design for Singapore Technologies. They are now known as ST (Satellite System). Since then, we became part of the space ecosystem in the government’s efforts towards nurturing this new industry. ...
